During the manufacturing process of a semiconductor device, a film deposition is performed using a plasma chemical vapor deposition (plasma CVD) method, and an etching is performed using a reaction ion etching (RIE) method. Both of the aforementioned plasma CVD method and the RIE method employ plasma. In the course of the plasma treatments, ultraviolet (UV) rays may be generated, and damage an insulation film which contains silicon oxide or silicon nitride. The damage has become more problematic as the insulation film is ever getting thinner with the miniaturization of the semiconductor device.
Japanese Patent Application Publication No. 2003-243545 discloses a semiconductor device capable of suppressing the damage by the UV rays (related art 1). FIG. 1 is a cross sectional view of the related art 1 showing an ONO film 18 formed by depositing a tunnel oxide film 12, a charge storage layer 14 and a top oxide film 16 on a semiconductor substrate 10. A gate electrode 20 is formed on the ONO film 18. Bit lines 22 are formed in the semiconductor substrate 10 to have the respective adjacent side edges below the gate electrode 20. Side wall layers 24 are formed on both side surfaces of the gate electrode 20. A lower insulation film 26 is formed on the ONO film 18 to cover the gate electrode 20. A UV absorbing layer 28 and an upper insulation film 30 are formed on the lower insulation film 26. Plug metals 32 are formed above the bit lines 22 by piercing the ONO film 18, the lower insulation film 26, the UV absorbing layer 28, and the upper insulation film 30. Another plug metal 32 is formed above the gate electrode 20 by piercing the lower insulation film 26, the UV absorbing layer 28, and the upper insulation film 30.
In related art 1, through holes are formed above the bit lines 22 and the gate electrode 20 to form the plug metals 32. Each through hole pierces the UV absorbing layer 28 and the upper insulation film 30. Since the UV absorbing layer 28 is formed above the ONO film 18, the UV rays during the etching process may be absorbed by the UV absorbing layer 28. Accordingly, the amount of the UV rays which reach the ONO film 18 is reduced, thus suppressing the UV ray damage to the ONO film 18. Japanese Patent Application Publication No. 2005-347589 also discloses a technique for preventing the ONO film 18 from being damaged by the UV rays, where the UV absorbing layer 28 also serves as a wiring.
In the related arts, the UV absorbing layer 28 is generally formed of metal. As the semiconductor or the insulation films of the semiconductor device have a large number of dangling bonds, a leak current may be generated and flows between the plug metals 32 via the UV absorbing layer 28. A technique for suppressing the generation of the leak current is described in FIG. 2. In FIG. 2, a gap D is provided between the plug metals 32 and the UV absorbing layer 28. The gap D separates the plug metals 32 and the UV absorbing layer 28. Other components of the semiconductor device in the related arts are the same as that of the related arts shown in FIG. 1, so their description is omitted. In FIG. 2, the upper insulation film 30 with the gap D electrically separates the individual plug metals 32 to suppress the leak current from flowing between the plug metals 32. However, as the semiconductor device is miniaturized, so is the interval between the plug metals 32 as well as the gaps between the plug metals 32 and the UV absorbing layer 28. Thus, the leak current may still flow through the UV absorbing layer 28 and electrically conduct the plug metals 32, thus making the operation of the semiconductor device prone to a failure.